Atomicity

Reading: 9.1-9.2.2, 9.3-9.4.1, 9.5-9.6 (9.1.5, 9.1.6, 9.5.2, 9.5.3, 9.6.3)

Overview¶

An action that changes several data values can have any or all of at least four independent properties:

• all-or-nothing (either all or none of the changes happen)
• before-or-after (the changes all happen either before or after every concurrent action)
• constraint-maintaining (the changes maintain some specified invariant)
• durable (the changes last as long as they are needed).

failure masking, coordination

1. scenario 1: the processor instruction set interface as seen by a thread in the interrupt interface

   • signal arriving from outside the thread’s interpreter

     • interrupted thread, interrupt thread, interrupt handler

     • Ex, an I/O operation that the other thread was waiting for may now have completed.

   • sth wrong in the interrupted thread

     • exception handler, in the orginal thread

     • Ex, deadlock, hw/sw faults, user side, the running thread encountered a missing-page exception in a virtual memory system

2. scenario 2: a register overflow at the machine level in a layered application

   • Write intelligible error message in each layer

   • A higher layer will hide the lower layers

   • All-or-nothing action means an action either completes or backs out.

3. missing-page exception occurs halfway of an instruction (pipelined processor)

   • How to save the next-instruction pointer?
     • every instruction is atomic -> the next-instruction pointer = addr of instruction that encountered the missing page
     • if one instruction is not atomic, the exception will still happen in that instruction
   • supervisor call (SVC) to a kernel READ procedure, keystroke to the caller
     • blocking read
     • non-blocking read
     • without all-or-nothing read

All-or-Nothing¶

Before-or-After¶

Problem 0: describe a situation where Two-Phase Locking yields higher performance than Simple Locking.